RSP 2019 Program

Rapid System Prototyping will be part of ESWeek'19 and will be held on October 17-18, 2019.
The current version of the program is presented below.

The proceedings can be downloaded through this secured link. Access credentials will be provided during the event to the registered attendees.

 


Workshop location:

NYU Brooklyn Campus, 370 Jay St, Brooklyn, NY
Room 1015
 
Detailed access information and directions can be found at this link:
 

 

October, 17th (Thursday)

 

09:00 - 10:00    Keynote 1 - Session Chair: Brett H. Meyer, McGill University

  • 09:00 - Siddharth Garg (New York University), "A Critical Viewpoint on the use of Machine Learning for Electronic Design Automation"


10:00 - 10:30    Coffee Break

10:30 - 12:00    Session 1 - Software - Session Chair: Henri-Pierre Charles, CEA-LIST

  • 10:30 - Louis Bonicel, Roland Bohrer, Benoit Leprettre, Frédéric Rousseau and Frédéric Pétrot, "Multi-Triggered Embedded Software Code Generation for Electrical Metering and Protection Applications"
  • 11:00 - Keita Miura, Shota Tokunaga, Noriyuki Ota, Yoshiharu Tange and Takuya Azumi, "Autoware Toolbox: MATLAB/Simulink Benchmark Suite for ROS-based Self-driving Software Platform"
  • 11:30 - (Short) Josue Quiroga, Marti Torrents, Nehir Sonmez, Dimitris Theodoropoulos, Ferad Zyulkyarov and Mario Nemirovsky, "Evaluation of a Rack-Scale Disaggregated Memory Prototype for Cloud Data Centers"


11:50 - 13:30    Lunch

13:30 - 15:00    Session 2 - Security, Verification and Reliability - Session Chair: Sungjoo Yoo, Seoul National University

  • 13:30 - Tobias Strauch, "Combining Simulation and FPGA Based Verification to an Affordable and Ultra-Fast Multi-Billion-Gate Verification System"
  • 14:00 - Derek Yu, Michael Vaquier, Evan Laflamme, Gabrielle Doucette-Poirier, Justin Tremblay and Brett Meyer, "ARINC-825TBv2: A Hardware-in-the-loop Simulation Platform for Aerospace Security Research"
  • 14:30 - (Short) Amira Guesmi, Ihsen Alouani, Mouna Baklouti, Tarek Frikha, Atika Rivenq and Mohamed Abid, "HEAP: A Heterogeneous Approximate Floating-Point Multiplier for Error Tolerant Applications"


14:50 - 15:30    Coffee Break

15:30 - 16:30    Session 3System Modeling and Prototyping - Session Chair: Kenneth Kent, University of New Brunswick

  • 15:30 - Salah Eddine Saidi, Amir Charif, Tanguy Sassolas, Pierre-Guillaume Le Guay, Henrique Vicente Souza and Nicolas Ventroux, "Fast Virtual Prototyping of Cyber-Physical Systems using SystemC and FMI: ADAS Use Case"
  • 16:00 - Artur Rataj and Etienne Borde, "Fast and robust modelling using a direct translation from a robotic application to its abstracted behaviour"

 

October, 18th (Friday)

09:00 - 10:00    Keynote 2 - Session Chair: Brett H. Meyer, McGill University

  • 09:00 - Ayse K. Coskun (Boston University), "Intelligent Analytics for Improving Computer System Design"


10:00 - 10:30    Coffee Break

10:30 - 12:10    Session 4 - Hardware - Session Chair: Frédéric Rousseau - TIMA, University Grenoble-Alpes

  • 10:30 - Charles Hartsell, Nagabhushan Mahadevan, Shreyas Ramakrishna, Abhishek Dubey, Theodore Bapty, Taylor T Johnson, Xenofon Koutsoukos, Janos Sztipanovits and Gabor Karsai, "CPS Design with Learning-Enabled Components: A Case Study"
  • 11:00 - Aleksei Popov, "Heterogeneous system for large-scale graph operations"
  • 11:30 - (Short) Riyane Sid Lakhdar, Henri-Pierre Charles and Maha Kooli, "Toward Modeling Cache-Miss Ratio for Dense-Data-Access-Based Optimization"
  • 11:50 - (Short) Scott Young, Alexandrea Demmings, Nasrin Ivari, Jean-Philippe Legault and Kenneth Kent, "Verilog Loop Unrolling, Module Generation, Part-Select and Arithmetic Right Shift Support in Odin II"

12:10 - 13:30    Lunch & End of Symposium

 


Keynote 1

Siddharth Garg (New York University), "A Critical Viewpoint on the use of Machine Learning for Electronic Design Automation"

The successes of machine learning (ML), especially deep learning (DL), has spurred interest in its use in electronic design automation (EDA). A promised outcome of DL-enhanced design flows is a fast and scalable development cycle and rapid prototyping, resulting in high-quality designs. Despite this promise, however, a large body of work on adversarial ML has called into question the robustness of state-of-the-art ML methods, and DL in particular, against test and training time attacks. These attacks raise fundamental questions about whether DNNs actually learn true physical concepts from the underlying problem domain. Paralleling this growing body of work in wider adversarial ML, this talk seeks to examine ML for EDA under an adversarial lens. The talk will describe critical blind-spots of DNNs and how they can negatively impact EDA tool-flows. We will conclude with potential directions for future research.
 
Prof. Siddharth Garg received his Ph.D. degree in Electrical and Computer Engineering from Carnegie Mellon University in 2009, and a B.Tech. degree in Electrical Enginerring from the Indian Institute of Technology Madras. He joined NYU in Fall 2014 as an Assistant Professor, and prior to that, was an Assistant Professor at the University of Waterloo from 2010-2014. His general research interests are in computer engineering, and more particularly in secure, reliable and energy-efficient computing.

In 2016, Siddharth was listed in Popular Science Magazine's annual list of "Brilliant 10" researchers. Siddharth has received the NSF CAREER Award (2015), and paper awards at the IEEE Symposium on Security and Privacy (S&P) 2016, USENIX Security Symposium 2013, at the Semiconductor Research Consortium TECHCON in 2010, and the International Symposium on Quality in Electronic Design (ISQED) in 2009. Siddharth also received the Angel G. Jordan Award from ECE department of Carnegie Mellon University for outstanding thesis contributions and service to the community. He serves on the technical program committee of several top conferences in the area of computer engineering and computer hardware, and has served as a reviewer for several IEEE and ACM journals.


Keynote 2

Ayse K. Coskun (Boston University), "Intelligent Analytics for Improving Computer System Design"

Today’s computers, ranging from small-scale embedded to large-scale systems, face challenges in delivering predictable performance, while maintaining efficiency, resilience, and security. Much of computer system management has traditionally relied on (manual) expert analysis and policies that rely on heuristics derived based on such analysis. This talk will demonstrate a new approach on designing “automated analytics” methods for computing systems, leading the path towards a longer term vision where computing systems are able to self-manage and improve.
 
Specifically, the talk will first cover how to systematically diagnose root causes of performance variations (or performance “anomalies”), which cause substantial efficiency losses and higher cost. Second, it will discuss how to identify applications running on computing systems and discuss how such discoveries can help reduce vulnerabilities and avoid unwanted applications.
 
This talk will highlight how to apply machine learning to help understand complex systems, demonstrate methods to help standardize study of performance anomalies, and point out future directions in automating computing system management.
 
Prof. Ayse K. Coskun is currently an associate professor at Boston University (BU), Electrical and Computer Engineering Department. Her research interests include design automation, architecture, and systems, with a particular focus on energy efficiency and intelligent analytics for computing systems, spanning from small-scale mobile devices and emerging chip technologies to large-scale computers. She received her PhD degree from University of California San Diego (UCSD), Computer Science and Engineering Department. She worked at Sun Microsystems (now Oracle) prior to her appointment at BU. Prof. Coskun is currently an associate editor of the IEEE Transactions on Computers and serves in the executive committee of the IEEE Council on EDA (CEDA). She received the NSF CAREER award (2012), several best paper awards, and the IEEE CEDA Ernest Kuh Early Career Award (2017). Coskun was recently selected to attend the National Academy of Engineering’s Frontiers of Engineering Symposium in 2019.