RSP 2022 Program

Rapid System Prototyping is be part of ESWEEK'22 and is held this year as a virtual event.  

Note that attendees have access to all associated ESWEEK events!

The current version of RSP'2022 live technical sessions is presented below.


October 13th (Thursday)


Indicated time is in CET (Europe) time zone

16:50 - Welcome and Opening Remarks

17:00 - 17:45  Session 1 - Application-specific designs for vision

  • Dominique Heller (Lab-STICC/UBS), Mostafa Rizk (Lab-STICC/IMT Atlantique), Ronan Douguet (Lab-STICC/UBS), Amer Baghdadi (IMT Atlantique/Lab-STICC), Jean-Philippe Diguet (IRL CROSSING/CNRS)
    Marine Objects Detection Using Deep Learning on Embedded Edge Devices
    [Trailer video]

  • Seungyeop Kang (Seoul National University), Sungjoo Yoo (Seoul National University)
    TernaryNeRF: Quantizing Voxel Grid-based NeRF Models
    [Trailer video]

  • Zijie Ning ((IMT Atlantique/Lab-STICC)), Mostafa Rizk (Lab-STICC/IMT Atlantique), Amer Baghdadi (IMT Atlantique/Lab-STICC), Jean-Philippe Diguet (IRL CROSSING/CNRS)
    Enhancing Embedded AI-based Object Detection Using Multi-view Approach
    [Trailer video]

17:45 - 18:00    Break

18:00 - 18:45  Session 2 - Processors and systems

  • Weiyan Zhang (DFKI GmbH), Mehran Goli (DFKI GmbH, University of Bremen), Alireza Mahzoon (University of Bremen), Rolf Drechsler (DFKI GmbH, University of Bremen)
    ANN-based Performance Estimation of Embedded Software for RISC-V Processors
    [Trailer video]

  • Arthur Vianès (TIMA/University Grenoble-Alpes), Frédéric Pétrot (TIMA/University Grenoble-Alpes), Frédéric Rousseau (TIMA/University Grenoble-Alpes), Benoît Dupont de Dinechin (Kalray)
    A Case for Second-Level Software Cache Coherency on Many-Core Accelerators
    [Trailer video]

  • Martim Rosado (CERN, Universidade de Lisboa), Stavros Mallios (CERN), Pedro Tomás (Universidade de Lisboa), Nuno Roma (Universidade de Lisboa), André David (CERN)
    Early Prototyping and Testing of CERN LHC CMS High-Granularity Calorimeter Slow-Control System
    [Trailer video]


18:45 - 19:00    Break

19:00 - 19:45  Session 3 - Analysis and trade-offs

  • Jakob Wenzel (Technische Universität Darmstadt), Christian Hochberger (Technische Universität Darmstadt)
    Automatically Restructuring HDL Modules for Improved Reusability in Rapid Synthesis
    [Trailer video]

  • Gabriel Rutsch (Infineon Technologies AG), Maximilian Groebner (Infineon Technologies AG), Anthony Sanders (Infineon Technologies AG), Konrad Maier (Infineon Technologies AG), Wolfgang Ecker (Infineon Technologies AG)
    A Framework That Enables Systematic Analysis of Mixed-Signal Applications on FPGA
    [Trailer video]

  • Ritwik Sinha (Hochschule Bonn-Rhein-Sieg), Seyed Damghani (University of New Brunswick), Kenneth Kent (University of New Brunswick)
    Machine Learning Based Hard/Soft Logic Trade-offs in VTR
    [Trailer video]


19:45 - 20:00  Break - End of Workshop